Kaynes Semicon Establishes First Overseas Chip Design Centre in Oman
Kaynes Semicon, a subsidiary of Kaynes Technology, inaugurated its first international chip design centre in Muscat, Oman, on Sunday. The centre was established in collaboration with Oman’s Ministry of Transport, Communications and Information Technology (MTCIT), and the Ministry of Labour. The new very large-scale integration (VLSI) design centre will focus on both front-end and back-end chip design processes. Raghu Panicker, CEO of Kaynes Semicon, stated, “The centre will help students with designing complex integrated circuits, chip fabrication, wafer preparation, etc.” The initiative aims to train 80 to 100 students annually in advanced VLSI design technologies. The Omani government has fully funded the design centre. “With this step, we are extending our plan of building a strong semiconductor ecosystem beyond India, supporting local governments,” said Ramesh Kannan, managing director of Kaynes Technology India. At the collaboration signing ceremony, Ali Al Shidhani, deputy minister of MTCIT, highlighted the importance of building a robust semiconductor sector as a critical pillar of the digital economy. Kaynes Semicon is also progressing with plans to produce India’s first packaged semiconductor chip by July 2025. In September 2024, the company received approval from the Union Cabinet to set up an Outsourced Semiconductor Assembly and Test (OSAT) facility in Sanand, Gujarat, with an investment of ₹3,307 crore. The facility is expected to have a capacity to produce 6.3 million chips per day. Kaynes Semicon’s move into Oman strengthens its research and development efforts and supports the growing semiconductor industry, helping both the company and Oman become rising players in global chip design and innovation. This initiative is integral to Oman’s National Program for Digital Economy and supports the vision of a diversified, knowledge-driven economy under Oman Vision 2040.
The initiative aims to train 80 to 100 students annually in advanced VLSI design technologies.
The initiative aims to train 80 to 100 students annually in advanced VLSI design technologies.
["chip design", "Kaynes Semicon", "Semiconductor India"]
["Go", "programming_languages:R", "AI", "innovation", "programming_languages:Go", "Git", "RAG", "Aim", "Kaynes Semicon", "Semiconductor India", "R", "chip design"]
["AI", "Aim", "RAG", "R", "Go", "Git", "innovation", "programming_languages:R", "programming_languages:Go"]
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